CPLD/ FPGA/ ISP/ 8051 Lab: CFI-491908


* Supported chip: Altera ACEX 1K (TQFP 144pins) or Xilinx Spartan2 (PQFP 208pins) FPGA on sub-board (You can choose one or both). Uses the software development tool provided by Altera or Xilinx to learn latest logic design.

* AHDL/VHDL and graphic method can be used to develop circuits

* Every I/O pin of ACEX chip has a logic status monitor

* Frequency generator: 1/10/100/1K/10K/100K/1M/10M/20M Hz

* For CPLD/ FPGA, Printer port can be used for downloading

* For 8051, COM1 or COM2 can be used for downloading

* Input units:
   Push button with light display x 8 pcs
   8-bit DIP switch input x 2 pcs
   Pulse generator button x 4 pcs
  (Positive edge trigger x 2 pcs, Negative edge trigger x 2 pcs)
   5x4 matrix keyboard Circumscribed I/O pins

* Output units:
   8*8 bi-color dot matrix LED *1 pc
16 x 2 LED x1 pc
   Stepping motor driver interface x 1 pc
   7-segment display x 6 pcs
   Buzzer x 1 pc
   LED output x 16 pcs
   Dice led output x 2 pcs

* Linear experiment units:
   8-bit D/A converter x 2 pcs
   8-bit A/D converter x 1 pc


* Counter
* Traffic light control
* Racing light control
* Stepper motor control
* 7-segment display control
* Digital clock control
* DIP switch control
* Push button control
* 8x8 bi-color dot matrix LED control
* A/D experiment
* D/A experiment
* ISP single chip 8051 experiment
* Audio frequency experiment
* Temperature


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